Discovery 2 user manual

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Call or Email Your Question. Select Your Vehicle. Sign Up Log In. Your Email Address. Filter By Vehicle. The wire kit included with the Analog Discovery 2 is a cheap, easy-to-use probing solution. However, the wire kit reduces the bandwidth of the scope and is susceptible to inducing noise and crosstalk from adjacent circuits. The main features are:. The single ended MHz clock is provided by the clock generator.

The ADG 2. The ADG features:. As shown in Fig. A divided version is provided to the DAC :. IC 15 in Fig. Important AD features:. IC16 in Fig. AD features:. Low-gain is used to generate low amplitude signals with improved accuracy. A stereo audio output combines the two AWG channels Fig. AD was used for its features:. The second term is the common mode DC component, removed by AC coupling.

Figure 21 shows the typical spectral characteristic of the AWG. For the second experiment down , the AWG was connected to the scope inputs via the Analog Discovery wire kit. The Analog Discovery 2 Scope hardware was considered a reference for the experiments above because it has preferred spectral characteristics to the AWG. The Network Analyzer virtual instrument in WaveForms is used to perform synchronized signal synthesis and acquisition.

It takes control of channel 1 of AWG and of both scope channels. Sinus amplitude is set to 1V. The characteristic is built in steps. The analog circuitry described in previous chapters includes passive and active electronic components. The datasheet specs show parameters resistance, capacitance, offsets, bias currents, etc. The equations in previous chapters consider typical values. To minimize these effects, the design uses:.

A software calibration is performed on each device as a part of the manufacturing test. AWG signals are passed to a reference instrument and reference signals are connected to the Scope inputs. A set of measurements is used to identify all the DC errors Gain, Offset of each analog stage.

Correction Calibration parameters are computed and stored in the Calibration Memory, on the Analog Discovery 2 device, as Factory Calibration. The WaveForms software allows the user performing an in-house calibration and overwrite the Calibration Data. Returning to Factory Calibration is always possible. The WaveForms Software reads the calibration parameters from the connected Analog Discovery 2 and uses them to correct both generated and acquired signals.

J3 is the Analog Discovery 2 user signal connector. PTC thermistors provide thermal protection in case of shortcuts. For output pins, the PTCs and the load impedance limit the bandwidth and power. Inputs are 5V tolerant. This block includes all power monitoring and control circuitry, internal power supplies, and user power supplies. The external power input is protected against reverse voltage; Q4 turns OFF if a floating power supply with negative polarity on central pin of J4 is used.

However, the device is not protected for a very unlikely use case:. ADCMP is a window comparator with the following features:. Running instruments are not affected, except User Supplies get more available power. However, removing the external power supply during External mode is not seamless. The FPGA gets unpowered and loses configuration data. All the instruments can then be run, in the USB mode. A hot swap retry is initiated after:. Similarly, IC26 in Racing or External modes , limits the current consumed from the external power supply to:.

The Analog Discovery 2 user pins are overvoltage protected. If the back-powered energy is higher than the used energy, the bi-directional power supply recovers the difference and delivers it to the previous node in the power chain. D28 in Fig. ADP main features:. IC27 in Fig.

ADM was selected for its main features:. IC27 limits the current consumed by both user power supplies together. After considering the efficiency of the user supply stages, about mA is available for user in both supplies together, in USB Only mode. The user power supplies Fig.

Main features:. Additionally, IC46B introduces the required inversion for the negative supply. IC43 Fig. Even so, output voltages below absolute value of 0. Analog supplies need to have very low ripple to prevent noise from coupling into analog signals. Ferrite beads are used to filter the remaining switching noise and to separate the power supplies that go to the main analog circuit blocks, to avoid crosstalk.

The 3. The The ADP features:. The 5. Both Sepic and Cuk converters are connected to the same switching pin of the regulator. Only the positive Sepic output is regulated, while the negative output tracks the positive one. This is an accepted behavior, since similar load currents are expected on both positive and negative rails. The output current in a Sepic is discontinuous which results in a higher output ripple.

To lower this ripple an additional output filter is added to the positive rail. The 1V digital supply Fig. It also features:. The main requirement for the 3. When a user pin is overdriven the protection diode opens and back powers circuitry connected to this supply. If the back powered energy is higher than the used energy the regulator delivers it to its input, preventing the 3.

The 1. AD main features are:. The configured logic performs:. Multiple configuration files are available through the WaveForms software to allocate the RAM resources according to the application.

Detail of the trigger system is shown in Fig. Each instrument generates a trigger signal when a trigger condition is met.

Each trigger signal including external triggers can trigger any instrument and drive the external trigger outputs. This way, all the instruments can synchronize to each other. This chapter shows the features and performances as described in the Analog Discovery 2 Datasheet. Footnotes add detailed information and annotate the HW description in this Manual. When it starts running, the competing instruments are forced to a BUSY state.

When running a competing instrument, this instrument is forced to a BUSY state. Toggle Navigation. Table of Contents. Oscilloscope 2. Scope Input Divider and Gain Selection 2. Scope Buffer 2. Scope Reference and Offset 2. Scope Driver 2. Clock Generator 2. Scope ADC 2. Analog Section 2. Digital Section 2. Scope Signal Scaling 2. Waveform Generator 3. AWG Reference and Offset 3. AWG Out 3. Audio 3. AWG Spectral Characteristics 4.

Calibration Memory 5. Power Supplies and Control 6. USB Power Control 6. Analog Supplies Control 6. User Supplies Control 6. User Voltage Supplies 6. Internal Power Supplies 6. Analog Supplies 6. Digital Supplies 6. Temperature Measurement 7. USB Controller 8. FPGA 9. Features and Performances 9. Analog Inputs Scope 9. Analog Outputs Arbitrary Waveform Generator 9. Logic Analyzer 9. Digital Pattern Generator 9. Power Supplies 9.

Other features. Stereo audio amplifier to drive external headphones or speakers with replicated AWG signals. The maximum available output current and power depend on the Analog Discovery 2 powering choice:. Network analyzer — Bode, Nyquist, Nichols transfer diagrams of a circuit. Range: 1Hz to 10MHz. Ability to use an external power supply and consequently deliver more power to user supplies.

High or low-gain can be selected by the FPGA. Driver : provides appropriate signal levels and protection to the ADC. Offset voltage is added for vertical position setting. Scope Reference and Offset : generates and buffers reference and offset voltages for the scope stages.

ADC : the analog-to-digital converter for both scope channels. The Power Supplies and Control block generates all internal supply voltages as well as user supply programmable voltages. The control block also monitors the device power consumption for USB compliance when power is supplied via the USB connection.

When external power supply is used, the control block allows more power for the user supplies. Under the FPGA control, power for unused functional blocks can be turned off.

The Calibration Memory stores all calibration parameters. Instead, a calibration operation is performed at manufacturing or by the user , and parameters are stored in memory. The WaveForms software uses these parameters to correct the acquired data and the generated signals. Controlled capacitance, much higher than the parasitical capacitance of subsequent stages. Figure 4. Scope buffer. Output noise 0. Serial interface up to 50 MHz. Driving the differential inputs of the ADC with low impedance outputs.

Providing the common mode voltage for the ADC. Adding the offset for vertical position on the scope. This way, the added offset can be either positive or negative. ADC protection by clamping the output signals. Figure 7. Phase noise figure for the clock generator. Figure 8. Clock generator. Figure 9.